M12L16161A-7T

本公司经营M12L16161A-7T，质量保证，欢迎咨询洽谈。

FEATURES

1.JEDEC standard 3.3V power supply

2.LVTTL compatible with multiplexed address

3. Four banks operation

4. MRS cycle with address key programs

- CAS Latency (2 & 3)

- Burst Length (1, 2, 4, 8 & full page)

- Burst Type (Sequential & Interleave)

5. All inputs are sampled at the positive going edge of the system clock

6.DQM for masking

7.Auto & self refresh

8.15.6μs refresh interval

ORDERING INFORMATION

54 Pin TSOP (Type II) (400mil x 875mil )

PRODUCT NO. MAX FREQ. PACKAGEComments

M12L64164A-5TG200MHz TSOP II Pb-free

M12L64164A-6TG166MHz TSOP II

Pb-free

M12L64164A-7TG143MHz TSOP II Pb-free

GENERAL DESCRIPTION

The M12L64164A is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 1,048,576 words by16 bits. Synchronous design allows precise cycle controls with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications