TS25L16AP

TS25L16AP

16 Mbit Serial Flash memory with 50 MHz

SPI bus Interface

Features

Architectural Advantages

Single power supply operation

• Full voltage range: 2.8 to 3.6 V read and

program operations

Memory Architecture

• 32ea sectors with 512 Kb each

Program

• Page Program (up to 256 bytes) in 2.8 ms

(typical)

• Fast Page Program (256 bytes) in 0.3ms

(typical)

• Program cycles are on a page by page basis

Erase

• 2ms typical Page Erase Time

• 2ms typical SubSector Erase Time

• 32ms typical Sector Erase time

• 1 sec typical Bulk Erase time

Cycling Endurance

• 100,000 P/E cycles per sector typical

Function guarantee

Data Retention

• 20 years typical

Device ID

• JEDEC standard two-byte electronic

signature

Package Option

• Industry Standard Pin-outs

• 8-pin SOP 208 mil

Performance Characteristics

Speed

• 50 MHz clock rate (maximum)

Power Saving Standby Mode

• Standby Mode 50 µA (typical)

• Deep Power-down Mode 50 µA (typical)

Page Write Function

• Page program instruction allows bytes to be

written in the memory without erase.

Memory Protection Features

Memory Protection

• W# (SO2) pin works in conjunction with

Status Register Bits to protect specified

memory areas

• Status Register Block Protection bits (BP3,

BP2, BP1, BP0) in status register configure

parts of memory as read-only

Software Features

SPI Bus Compatible Serial Interface